This invention relates generally to semiconductor device fabrication, and more particularly to the detection of out-of-focus conditions during lithographic processing.
Since the invention of the integrated circuit (IC), semiconductor chip features have become exponentially smaller and the number of transistors per device exponentially larger. Advanced IC""s with hundreds of millions of transistors at feature sizes of 0.25 micron, 0.18 micron, and less are becoming routine. Improvements have allowed optical steppers to significantly reduce the resolution limit for semiconductor fabrication far beyond one micron. To continue to make chip features smaller, and increase the transistor density of semiconductor devices, IC""s have begun to be manufactured that have features smaller than the lithographic wavelength. Sub-wavelength lithography, however, places large burdens on lithographic processes. Resolution of anything smaller than a wavelength is generally quite difficult. Pattern fidelity can deteriorate dramatically in sub-wavelength lithography. The resulting semiconductor features may deviate significantly in size and shape from the ideal pattern drawn by the circuit designer.
One particular issue that impacts the quality of lithography is focus variation, which is nearly ubiquitous in IC manufacturing because of the combined effects of many problems, such as wafer non-flatness, auto-focus errors, leveling errors, lens heating, and so on. A useful lithographic process should be able to print acceptable patterns in the presence of some focus variation. Similarly, a useful lithographic process should be able to print acceptable patterns in the presence of variation in the exposure dose, or energy, of the light source being used. To account for these simultaneous variations of exposure dose and focus (or lack thereof), it is useful to map out the process window, such as an exposure-defocus (ED) window, within which acceptable lithographic quality occurs. The process window for a given feature shows the ranges of exposure dose and depth of focus (DOF) that permit acceptable lithographic quality.
For example, FIG. 1 shows a graph 100 of a typical ED process window for a given semiconductor pattern feature. The y-axis 102 indicates exposure dose of the light source being used, whereas the x-axis 104 indicates DOF. The line 106 maps exposure dose versus DOF at one end of the tolerance range for the critical dimension (CD) of the pattern feature, whereas the line 108 maps exposure dose versus DOF at the other end of the tolerance range for the CD of the feature. The area 110 enclosed by the lines 106 and 108 is the ED process window for the pattern feature, indicating the ranges of both DOF and exposure dose that permit acceptable lithographic quality of the feature. Any DOF-exposure dose pair that maps within the area 110 permits acceptable lithographic quality of the pattern feature. As indicated by the area 110, the process window is typically indicated as a rectangle, but this is not always the case, nor is it necessary.
To detect out-of-focus conditions, as well as to measure feature CD, a particular semiconductor design for this purpose may be included on an unused part of the semiconductor wafer. FIG. 2 shows one such design 200, the width 202 of which corresponds to the desired feature CD. The design 200 has two lower arms 204 and 206. Unfortunately, the design 200 does not allow for easy detection of out-of-focus conditions during lithographic processing. This is shown in FIG. 3. The graph 300 measures CD on the y-axis 302, corresponding to the width 202 of the design 200 of FIG. 2, and defocus on the x-axis 304, with best focus substantially in the middle of the x-axis 304. A reference line 306 indicates 0.3 micron, and another reference line 307 indicates 0.2 micron. As defocus decreases and then increases along the x-axis 304, the width 202 as indicated by the line 308 barely decreases before increasing again.
Utilization of the semiconductor design 200 to detect out-of-focus conditions during lithographic processing thus is accomplished only with great difficulty. Because of the minute changes in the width 202 of the design 200 as defocus decreases and then increases, the measuring mode on lithographic equipment is typically switched from automatic measuring to manual measuring. Automatic measuring is substantially machine performed, requiring little human oversight, whereas manual measuring is substantially human performed. This great involvement by the semiconductor technicians is expensive and time-consuming, however, slowing the rate at which semiconductor devices can be fabricated, which is costly to the semiconductor manufacturer.
Therefore, there is a need for a semiconductor design that allows for easier detection of out-of-focus conditions during lithographic processing. Such a design should allow for automatic measuring to be performed, so that unacceptable defocus can be machine detected. Such a design, in other words, should desirably allow for defocus detection without the need for expensive and time-intensive technician involvement. For these and other reasons, there is a need for the present invention.
The invention relates to a semiconductor design patternable on a semiconductor wafer for improved detection of out-of-focus conditions during lithographic processing. The semiconductor design includes a central main body, and at least one arm extending from sides of the central main body. Each arm has a first one or more at least substantially triangular shapes, and a disconnected second one or more at least substantially triangular shapes. A tip of the first shapes is positioned opposite a tip of the second shapes, such that a gap there between is formed. The gap increases in size as defocus increases.
The invention provides for advantages not found within the prior art. The gap is sensitive to out-of-focus conditions during lithographic processing, and the increase in gap size is preferably automatically detectable by semiconductor test equipment. Thus, the equipment does not have to be switched to manual mode for manual detection of defocus by semiconductor technicians. Rather, the equipment itself can automatically detect when out-of-focus conditions have occurred. This results in less costly and faster defocus detection. Other advantages, embodiments, and aspects of the invention will become apparent by reading the detailed description that follows, and by referencing the attached drawings.